Thermal and plasma treatments for improved (sub-)1 nm equivalent oxide thickness planar and FinFET-based replacement metal gate high-k last devices and enabling a simplified scalable CMOS integration scheme
A. Veloso(IMEC), Naoto Horiguchi(IMEC), Hiroaki Arimura(IMEC), E. Vecchio(IMEC), Farid Sebaai(IMEC), Eddy Simoen(IMEC), T. Witters(IMEC), S. Brus(University of Liège), Thierry Conard(IMEC), Vasile Paraschiv(IMEC), K. Devriendt(IMEC), Aaron Thean(National University of Singapore), A. Van Ammel, Yuichi Higuchi(Panasonic (Japan)), Kristof Kellens(IMEC), I. Vaesen(IMEC), Philippe Roussel(IMEC), N. Heylen(IMEC), H. Bender(IMEC), Harold Dekkers(IMEC), T. Chiarella(IMEC), G. Boccardi(IMEC), Raja Athimulam(IMEC), Jae Wook Lee(Korea Advanced Institute of Science and Technology), Lars‐Åke Ragnarsson(IMEC), Moon Ju Cho(IMEC), Soon Aik Chew(IMEC), Anish Dangol(IMEC), Olivier Richard(IMEC), Xiaoping Shi(IMEC), T. Schram(IMEC)
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