Challenges and opportunities of vertical FET devices using 3D circuit design layouts
A. Veloso(IMEC), Monique Ercken(IMEC), Philippe Matagne(IMEC), W. Li(IMEC), Erik Rosseel(IMEC), S. Brus(University of Liège), Vasile Paraschiv(IMEC), Nadine Collaert(IMEC), Trong Huynh-Bao, B. T. Chan, D. Mocuta(IMEC), Christie Delvaux(IMEC), Efrain Altamirano Sánchez, Janko Versluijs(IMEC), Niamh Waldron, Julien Ryckaert(IMEC), K. Devriendt(IMEC), E. Vecchio(IMEC)
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