An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substratesNiamh Waldron, A. V-Y. Thean, Clément Merckling et al.|Unknown|2014Cited by 90
Advancing CMOS beyond the Si roadmap with Ge and III/V devicesMarc Heyns, Liesbeth Witters, A. Alian et al.|Unknown|2011Cited by 60
(Invited) Vertical Nanowire FET Integration and Device AspectsA. Veloso, Aaron Thean, K. De Meyer et al.|ECS Transactions|2016Cited by 50
Integration of InGaAs Channel n-MOS Devices on 200mm Si Wafers Using the Aspect-Ratio-Trapping TechniqueNiamh Waldron, Aaron Thean, Gang Wang et al.|ECS Transactions|2012Cited by 43
Junctionless gate-all-around lateral and vertical nanowire FETs with simplified processing for advanced logic and analog/RF applications and scaled SRAM cellsA. Veloso, Aaron Thean, Bertrand Parvais et al.|Unknown|2016Cited by 37