Low V<inf>T</inf> CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only Anneal
S. Kubicek(IMEC), S. Biesemans(IMEC), Laura Nyns(IMEC), Annelies Delabie(IMEC), Rita Vos(IMEC), T. Witters(IMEC), S. Brus(University of Liège), Vincent S. Chang(IMEC), T. Kauerauf(IMEC), Vasile Paraschiv(IMEC), M. Demand(IMEC), Thomas Hoffmann(IMEC), C. Vrancken(IMEC), E. Röhr(IMEC), L.-Å. Ragnarsson(IMEC), J.C. Hooker(NXP (Belgium)), Christoph Adelmann(Imec the Netherlands), H.Y. Yu(IMEC), Stefan De Gendt(Imec the Netherlands), T. Chiarella(IMEC), H.-J. Cho(IMEC), A. Veloso(IMEC), Barry O’Sullivan(Toshiba (Japan)), P. Absil(IMEC), Sven Van Elshocht(Columbia University), R. Mitsuhashi(Panasonic (China)), A. Akheyar(IMEC), R. Singanamalla(IMEC), T. Schram(IMEC), K. De Meyer(IMEC), C. Kerner(IMEC)
Cited by 18
Related Papers
Origin of the threshold voltage instability in SiO<sub>2</sub>/HfO<sub>2</sub> dual layer gate dielectrics
|IEEE Electron Device Letters|2003|360
Electrical properties of high-κ gate dielectrics: Challenges, current issues, and possible solutions
|Materials Science and Engineering R Reports|2006|278
Effective electrical passivation of Ge(100) for high-k gate dielectric layers using germanium oxide
|Applied Physics Letters|2007|271
High-k dielectrics for future generation memory devices (Invited Paper)
|Microelectronic Engineering|2009|252