Low V<inf>T</inf> CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only AnnealS. Kubicek, S. Biesemans, T. Kauerauf et al.|Unknown|2007Cited by 18
Low V<inf>t</inf> Ni-FUSI CMOS Technology using a DyO cap layer with either single or dual Ni-phasesH.Y. Yu, S. Biesemans, S.Z. Chang et al.|Unknown|2007Cited by 11
Strain enhanced low-V<inf>T</inf> CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delayStefan Kubicek, Thomas Hoffmann, T. Schram et al.|Unknown|2008Cited by 9
Demonstration of a New Approach Towards 0.25V Low-Vt CMOS Using Ni-Based FUSIS. Biesemans, H.Y. Yu, Philip Absil et al.|Unknown|2006Cited by 6
Demonstration of Ni fully germanosilicide as a pFET gate electrode candidate on HfSiONH.Y. Yu, S. Biesemans, R. Singanamalla et al.|Unknown|2006Cited by 6