FinFETs with Thermally Stable RMG Gate Stack for Future DRAM Peripheral Circuits
E. Capogreco(IMEC), Naoto Horiguchi(IMEC), Hiroaki Arimura(IMEC), S. Yoon(SK Group (Japan)), Emmanuel Dupuy(IMEC), H. Itokawa, A. Spessot(IMEC), Farid Sebaai(IMEC), S. Subramanian(Semmelweis University), S. Brus(University of Liège), E. Dentoni Litta(IMEC), Y. Chen(Western Digital (Japan)), Zheng Gao(Western Digital (Japan)), D. Radisic(IMEC), Yusuke Oniki(IMEC), M. Yamaguchi, R. Ritzenthaler(IMEC), Dong Zhou(Ministry of Education of the People's Republic of China), Lars‐Åke Ragnarsson(IMEC), Boon Teik Chan(IMEC), P. Fazan(École Polytechnique Fédérale de Lausanne), Vladimir Machkaoutsan(ASM International (Belgium))
Cited by 10
Related Papers
Origin of NBTI variability in deeply scaled pFETs
|Unknown|2010|309
Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession
|Solid-State Electronics|2010|120
CMOS compatible fully integrated Mach-Zehnder interferometer in SOI technology
|IEEE Photonics Technology Letters|2000|93
An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates
|Unknown|2014|90
Insight Into N/PBTI Mechanisms in Sub-1-nm-EOT Devices
|IEEE Transactions on Electron Devices|2012|90