Electrical characteristics of 8-/spl Aring/ EOT HfO/sub 2//TaN low thermal-budget n-channel FETs with solid-phase epitaxially regrown junctions
Lars‐Åke Ragnarsson(IMEC), Marc Heyns(IMEC), M. Aoulaiche(IMEC), Michel Houssa(IMEC), Wilman Tsai(Intel (United States)), T. Kauerauf(IMEC), R. Degraeve(IMEC), Stefan De Gendt(Imec the Netherlands), Lionel Trojman(Universidad San Francisco de Quito), S. Severi(IMEC), D.P. Brunco(Imec the Netherlands), V. Kaushik(IMEC), K. D. Johnson(Intel (United States)), G. Groeseneken(KU Leuven), K. De Meyer(IMEC), Annelies Delabie(IMEC)
Cited by 32
Related Papers
Ultrathin (<4 nm) SiO2 and Si–O–N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits
|Journal of Applied Physics|2001|772
New insights in the relation between electron trap generation and the statistical properties of oxide breakdown
|IEEE Transactions on Electron Devices|1998|647
Origin of the threshold voltage instability in SiO<sub>2</sub>/HfO<sub>2</sub> dual layer gate dielectrics
|IEEE Electron Device Letters|2003|360