Ultrathin (<4 nm) SiO2 and Si–O–N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits
M. L. Green, Eric Garfunkel(Rutgers, The State University of New Jersey), R. Degraeve(IMEC), E. P. Gusev(IBM Research - Thomas J. Watson Research Center)
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