Statistical poly-Si grain boundary model with discrete charging defects and its 2D and 3D implementation for vertical 3D NAND channelsR. Degraeve, Aaron Thean, M. Karner et al.|Unknown|2015Cited by 41
Design-technology co-optimization for OxRRAM-based synaptic processing unitA. Mallik, P. Raghavan, Daniele Garbin et al.|Unknown|2017Cited by 39
Nitride Engineering for Improved Erase Performance and Retention of TANOS NAND Flash MemoryG. Van den bosch, Jan Van Houdt, M. B. Zahid et al.|Unknown|2008Cited by 31
Experimental and theoretical verification of channel conductivity degradation due to grain boundaries and defects in 3D NANDA. Subirats, A. Furnémont, A. Arreghini et al.|Unknown|2017Cited by 21