Dynamics of threshold voltage instability in stacked high-k dielectrics: role of the interfacial oxide
L. Pantisano(IMEC), H.E. Maes(IMEC), R. Degraeve(IMEC), E. Cartier(IBM (United States)), A. Kerber(Infineon Technologies (Germany)), G. Groeseneken(KU Leuven), M. Lorenzini(IMEC), M. Rosmeulen(IMEC)
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