A Combined Interface and Border Trap Model for High-Mobility Substrate Metal–Oxide–Semiconductor Devices Applied to $\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}$ and InP CapacitorsGuy Brammertz, Wei Wang, A. Alian et al.|IEEE Transactions on Electron Devices|2011Cited by 96
Advancing CMOS beyond the Si roadmap with Ge and III/V devicesMarc Heyns, Liesbeth Witters, A. Alian et al.|Unknown|2011Cited by 60
Low interfacial trap density and sub-nm equivalent oxide thickness in In0.53Ga0.47As (001) metal-oxide-semiconductor devices using molecular beam deposited HfO2/Al2O3 as gate dielectricsLi‐Kang Chu, Marc Heyns, Clément Merckling et al.|Applied Physics Letters|2011Cited by 54
Beyond interface: The impact of oxide border traps on InGaAs and Ge n-MOSFETsDennis Lin, Aaron Thean, H. Bender et al.|Unknown|2012Cited by 39
Ammonium sulfide vapor passivation of In0.53Ga0.47As and InP surfacesA. Alian, Marc Heyns, Guy Brammertz et al.|Applied Physics Letters|2011Cited by 26