High Quality Ge Virtual Substrates on Si Wafers with Standard STI PatterningRoger Loo, Matty Caymax, G. Wang et al.|Journal of The Electrochemical Society|2009Cited by 87
Advancing CMOS beyond the Si roadmap with Ge and III/V devicesMarc Heyns, Liesbeth Witters, Geert Eneman et al.|Unknown|2011Cited by 60
Germanium for advanced CMOS anno 2009: a SWOT analysisMatty Caymax, Marc Heyns, Geert Eneman et al.|Unknown|2009Cited by 60
Impact of EOT scaling down to 0.85nm on 70nm Ge-pFETs technology with STIJérôme Mitard, Marc Heyns, Christopher G. Shea et al.|Symposium on VLSI Technology|2006Cited by 42
Fabrication of high quality Ge virtual substrates by selective epitaxial growth in shallow trench isolated Si (001) trenchesG. Wang, Marc Heyns, Roger Loo et al.|Thin Solid Films|2009Cited by 24