Germanium MOSFET Devices: Advances in Materials Understanding, Process Development, and Electrical PerformanceD.P. Brunco, Marc Heyns, Karl Opsomer et al.|Journal of The Electrochemical Society|2008Cited by 267
High performance Ge pMOS devices using a Si-compatible process flowPaul Zimmerman, Marc Heyns, G. Nicholas et al.|Unknown|2006Cited by 104
Record I<inf>ON</inf>/I<inf>OFF</inf> performance for 65nm Ge pMOSFET and novel Si passivation scheme for improved EOT scalabilityJérôme Mitard, Marc Heyns, Brice De Jaeger et al.|Unknown|2008Cited by 56
Integration of InGaAs Channel n-MOS Devices on 200mm Si Wafers Using the Aspect-Ratio-Trapping TechniqueNiamh Waldron, Aaron Thean, Gang Wang et al.|ECS Transactions|2012Cited by 43
Impact of EOT scaling down to 0.85nm on 70nm Ge-pFETs technology with STIJérôme Mitard, Marc Heyns, Christopher G. Shea et al.|Symposium on VLSI Technology|2006Cited by 42