Optimization of Structure and Electrical Characteristics for Four-Layer Vertically-Stacked Horizontal Gate-All-Around Si Nanosheets Devices
Qingzhu Zhang(Hebei University of Technology), Jun Luo(Chinese Academy of Sciences), Xiaobin He(Chinese Academy of Sciences), Renren Xu(Chinese Academy of Sciences), Huaxiang Yin(Chinese Academy of Sciences), Zhenhua Wu(University of Chinese Academy of Sciences), Henry H. Radamson(Chinese Academy of Sciences), Jiaxin Yao(Chinese Academy of Sciences), Hong Yang(Chinese Academy of Sciences), Zhenzhen Kong(First Affiliated Hospital of Guangzhou Medical University), Zhaohao Zhang(University of Chinese Academy of Sciences), Gaobo Xu(University of Chinese Academy of Sciences), Guilei Wang(Chinese Academy of Sciences), Jie Gu(Chinese Academy of Sciences), Junjie Li(University of Chinese Academy of Sciences), Jinjuan Xiang(University of Chinese Academy of Sciences), Lei Cao(Chinese Academy of Sciences), Jiajia Tian(Chinese Academy of Sciences), Shujuan Mao(Chinese Academy of Sciences)
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