Measurement-based electrical characterization of through silicon vias and transmission lines for 3D integrationXin Sun, Yufeng Jin, Runiu Fang et al.|Microelectronic Engineering|2015Cited by 26
Fabrication, Characterization, and Simulation of a Low-Cost TSV Integration Without Front-Side CMP ProcessYong Guan, Yufeng Jin, Yunhui Zhu et al.|IEEE Transactions on Semiconductor Manufacturing|2016Cited by 9
Fabrication and Characterization of Annular Copper Through-Silicon via for Passive Interposer ApplicationsYong Guan, Yufeng Jin, Shenglin Ma et al.|IEEE Transactions on Semiconductor Manufacturing|2018Cited by 7
Fabrication and Comparison of Bumpless Wafer-on-Wafer Integration and Bump-Containing Chip-on-Chip IntegrationYong Guan, Yufeng Jin, Jing Chen et al.|IEEE Transactions on Components Packaging and Manufacturing Technology|2017Cited by 4
Fine‐pitch through‐silicon via integration with self‐aligned back‐side benzocyclobutene passivation layerYong Guan, Yufeng Jin, Shenglin Ma et al.|Micro & Nano Letters|2016Cited by 2