Measurement-based electrical characterization of through silicon vias and transmission lines for 3D integrationXin Sun, Yufeng Jin, Runiu Fang et al.|Microelectronic Engineering|2015Cited by 26
Development and characterization of a through-multilayer TSV integrated SRAM moduleYunhui Zhu, Yufeng Jin, Jing Chen et al.|Unknown|2013Cited by 9
Understanding effect of additives in copper electroplating filling for through silicon viaMin Miao, Yufeng Jin, Yunhui Zhu et al.|Unknown|2012Cited by 2
Process development of a stacked chip module with TSV interconnectionXiaoxia Zhong, Yufeng Jin, Shenglin Ma et al.|Unknown|2012Cited by 1
A TSV last integration approach with wafer level pre-patterned adhesive bondingYunhui Zhu, Yufeng Jin, Shenglin Ma et al.|2012 4th Electronic System-Integration Technology Conference|2012Cited by 0