Validation of Retention Modeling as a Trap-Profiling Technique for SiN-Based Charge-Trapping MemoriesA. Suhane, Jan Van Houdt, L. Breuil et al.|IEEE Electron Device Letters|2009Cited by 45
Quantitative and predictive model of reading current variability in deeply scaled vertical poly-Si channel for 3D memoriesM. Toledano-Luque, Jan Van Houdt, R. Degraeve et al.|Unknown|2012Cited by 34
Statistical characterization of current paths in narrow poly-Si channelsR. Degraeve, G. Groeseneken, M. Toledano-Luque et al.|Unknown|2011Cited by 30
Electron Trap Profiling Near $\hbox{Al}_{2} \hbox{O}_{3}$/Gate Interface in TANOS Stack Using Gate-Side Trap Spectroscopy by Charge Injection and SensingM. B. Zahid, Jan Van Houdt, B. Govoreanu et al.|IEEE Electron Device Letters|2010Cited by 19