Scalability of Ni FUSI gate processes: phase and Vt control to 30 nm gate lenghtsJ. A. Kittl, S. Baesmans, A. Veloso et al.|Unknown|2005Cited by 28
CMOS Integration of Dual Work Function Phase-Controlled Ni Fully Silicided Gates (NMOS:NiSi, PMOS:$\hbox{Ni}_{2}\hbox{Si}$, and $\hbox{Ni}_{31}\hbox{Si}_{12}$) on HfSiONJ. A. Kittl, S. Biesemans, A. Lauwers et al.|IEEE Electron Device Letters|2006Cited by 21
CMOS integration of dual work function phase controlled Ni FUSI with simultaneous silicidation of NMOS (NiSi) and PMOS (Ni-rich silicide) gates on HfSiONA. Lauwers, J. A. Kittl, A. Veloso et al.|Unknown|2006Cited by 17
Ni-based FUSI gates: CMOS Integration for 45nm node and beyondThomas Hoffmann, J. A. Kittl, A. Veloso et al.|Unknown|2006Cited by 16
Specific structural factors influencing on reliability of CVD-HfO/sub 2/Yoshihisa Harada, Dim-Lee Kwong, M. Niwa et al.|Unknown|2003Cited by 11