Scalability of Ni FUSI gate processes: phase and Vt control to 30 nm gate lenghtsJ. A. Kittl, S. Baesmans, A. Veloso et al.|Unknown|2005Cited by 28
Improved thermal stability of Ni-silicides on Si:C epitaxial layersVladimir Machkaoutsan, E.H.A. Granneman, Matthias Bauer et al.|Microelectronic Engineering|2007Cited by 27
Dual Work Function Phase Controlled Ni-FUSI CMOS (NiSi NMOS, Ni2Si or Ni31Si12 PMOS): Manufacturability, Reliability & Process Window Improvement by Sacrificial SiGe CapJ. A. Kittl, A. Veloso, S. Biesemans et al.|Unknown|2006Cited by 9
Demonstration of Ni fully germanosilicide as a pFET gate electrode candidate on HfSiONH.Y. Yu, S. Biesemans, R. Singanamalla et al.|Unknown|2006Cited by 6
High-κ dielectics integration prospectsS. Kubicek, S. Biesemans, A. Veloso et al.|Unknown|2005Cited by 0