Demonstration of scaled 0.099&#x00B5;m<sup>2</sup> FinFET 6T-SRAM cell using full-field EUV lithography for (Sub-)22nm node single-patterning technologyA. Veloso, S. Biesemans, S. Demuynck et al.|Unknown|2009Cited by 14
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High yield sub-0.1&#x00B5;m<sup>2</sup> 6T-SRAM cells, featuring high-k/metal-gate finfet devices, double gate patterning, a novel fin etch strategy, full-field EUV lithography and optimized junction design &amp; layoutNaoto Horiguchi, S. Biesemans, S. Demuynck et al.|Unknown|2010Cited by 8
Status 157-nm lithography development at IMECKurt Ronse, Harry Sewell, S. Beckx et al.|Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE|2003Cited by 1