Integration of tall triple-gate devices with inserted-Ta/sub x/N/sub y/ gate in a 0.274μm/sup 2/ 6t-sram cell and advanced CMOS logic circuitsLiesbeth Witters, S. Biesemans, S. Beckx et al.|Unknown|2005Cited by 12
Integration challenges for multi-gate devicesNadine Collaert, S. Biescmans, S. Brus et al.|Unknown|2005Cited by 11
Gate isolation technology for compact poly-CMP embedded flash memoriesM. Slotboom, Ivan Pollentier, P. Goarin et al.|Unknown|2004Cited by 5
Integration of tall triple-gate devices with inserted TaxNy gate in a 0.274µm2 6T-SRAM cell and advanced CMOS logic circuitsLiesbeth Witters, S. Biesemans, Nadine Collaert et al.|Unknown|2005Cited by 4