A Combined Interface and Border Trap Model for High-Mobility Substrate Metal–Oxide–Semiconductor Devices Applied to $\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}$ and InP Capacitors
Guy Brammertz(IMEC), Wei Wang(Chinese Academy of Tropical Agricultural Sciences), A. Alian(IMEC), Matty Caymax(IMEC), Marc Meuris(IMEC), Dennis Lin(IMEC)
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