First monolithic integration of Ge P-FETs and InAs N-FETs on silicon substrate: Sub-120 nm III-V buffer, sub-5 nm ultra-thin body, common raised S/D, and gate stack modules
Sachin Yadav(National University of Singapore), Yee‐Chia Yeo(Agency for Science, Technology and Research), Annie(National University of Singapore), Kian Hui Goh(Nanyang Technological University), Kain Lu Low(University of Liverpool), Nanyan Chen(National University of Singapore), Soon-Fatt Yoon(Nanyang Technological University), Sujith Subramanian(National University of Singapore), Kian-Hua Tan(Nanyang Technological University), Gengchiau Liang(Chinese Academy of Sciences), Bowen Jia(National University of Singapore), Xiao Gong(University of Michigan)
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