First monolithic integration of Ge P-FETs and InAs N-FETs on silicon substrate: Sub-120 nm III-V buffer, sub-5 nm ultra-thin body, common raised S/D, and gate stack modulesSachin Yadav, Yee‐Chia Yeo, Xiao Gong et al.|Unknown|2015Cited by 15
PBTI characteristics of N-channel tunneling field effect transistor with HfO<inf>2</inf> gate dielectric: New insights and physical modelGenquan Han, Yee‐Chia Yeo, Yue Yang et al.|Unknown|2012Cited by 8
Tunnel Field-Effect Transistor with L-shaped Germanium Source: Device Physics and DesignKain Lu Low, Yee‐Chia Yeo, Chunlei Zhan et al.|Unknown|2011Cited by 0
Selective Growth of Gallium Arsenide on Germanium Fins with Different Orientations formed on 10 degrees Offcut Germanium-on-Insulator SubstrateKian Hui Goh, Yee‐Chia Yeo, Yuxia Cheng et al.|Unknown|2012Cited by 0
(Invited) Enabling Hetero-Integration of III-V and Ge-Based Transistors on Silicon with Ultra-Thin Buffers Formed by Interfacial Misfit TechniqueXiao Gong, Yee‐Chia Yeo, Sachin Yadav et al.|ECS Meeting Abstracts|2016Cited by 0