A 12nm 4Mb 104.56-to-137.75TFLOPS/W Charge-Trap Transistor-Based Computing-in-Memory Macro Using Analog-Predict-Digital-Compute for AI Edge DevicesJunzhe Shen, Ming Liu, Zhidao Zhou et al.|Unknown|2026Cited by 2
A 1763.9TOPS/W 520kb Scalable FeFET-Based Analog Computing-in-Memory Chip Using BEOL HZO Capacitor for On-chip LearningWeizeng Li, Ming Liu, Junyu Zhu et al.|Unknown|2025Cited by 1
A hybrid-tiling attention accelerator with a fully-pipelined balanced systolic array in 3D hybrid-bonding near-DRAM integrationZhongze Han, Chunmeng Dou, Hanghang Gao et al.|Microelectronics Journal|2026Cited by 1
30.6 A 16Mb 166.8TOPS/W Near-Memory Phase-Domain-Computing Ferroelectric NAND Flash for Approximate Nearest Neighbor Search on Edge DevicesWeizeng Li, Ming Liu, Bohan Wang et al.|Unknown|2026Cited by 1
A 14-nm Nonvolatile-Volatile-Fused Compute-In-Memory Macro Based on Logic-Compatible Flash for Plastic Neural NetworksWeizeng Li, Ming Liu, Linfang Wang et al.|IEEE Journal of Solid-State Circuits|2026Cited by 0