A 12nm 4Mb 104.56-to-137.75TFLOPS/W Charge-Trap Transistor-Based Computing-in-Memory Macro Using Analog-Predict-Digital-Compute for AI Edge Devices
Junzhe Shen(Chinese Academy of Sciences), Ming Liu(Chinese Academy of Sciences), Zhongze Han(Chinese Academy of Sciences), Z. Li(Chinese Academy of Sciences), Chunmeng Dou(Chinese Academy of Sciences), Linfang Wang(Chinese Academy of Sciences), Hanghang Gao(Chinese Academy of Sciences), Zhidao Zhou(Chinese Academy of Sciences), Bohan Wang(Chinese Academy of Sciences), Hongyang Hu(Chinese Academy of Sciences), Junyu Zhu(Chinese Academy of Sciences), Wenfeng Zha(Chinese Academy of Sciences), Weizeng Li(Chinese Academy of Sciences), Qing Luo(Chinese Academy of Sciences), Y. F. Wang(Chinese Academy of Sciences)
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