A 0.13 µm 8 Mb Logic-Based Cu$_{\rm x}$Si$_{\rm y}$O ReRAM With Self-Adaptive Operation for Yield Enhancement and Power ReductionXiaoyong Xue, Jingang Wu, Wenxiang Jian et al.|IEEE Journal of Solid-State Circuits|2013Cited by 42
A Logic Resistive Memory Chip for Embedded Key Storage With Physical SecurityYufeng Xie, Jingang Wu, Xiaoyong Xue et al.|IEEE Transactions on Circuits & Systems II Express Briefs|2015Cited by 26
Low-Power Variation-Tolerant Nonvolatile Lookup Table DesignXiaoyong Xue, Jingang Wu, Jianguo Yang et al.|IEEE Transactions on Very Large Scale Integration (VLSI) Systems|2015Cited by 8
Dynamic Data-Dependent Reference to Improve Sense Margin and Speed of Magnetoresistive Random Access MemoryXiaoyong Xue, Jingang Wu, Yanqing Zhao et al.|IEEE Transactions on Circuits & Systems II Express Briefs|2016Cited by 6
Dual Resistive Switching Characteristics in Cu$_{x}$Si$_{y}$O Resistive MemoryLingming Yang, Jingang Wu, Ying Shirley Meng et al.|Applied Physics Express|2012Cited by 3