Vertical Nanowire Gate-All-Around p-type Tunneling Field-Effect Transistor With Si 0.8 Ge 0.2 /Si Heterojunction
Arvind Soundarapandian, Sungjoo Lee(Tohoku University), Navab Singh(Agency for Science, Technology and Research), Zhixian Chen(ShanghaiTech University), Xiang Li, Ramanathan Gandhi(Agency for Science, Technology and Research)
Unknown
January 1, 2012
Cited by 2
Related Papers
Phosphorene/rhenium disulfide heterojunction-based negative differential resistance device for multi-valued logic
|Nature Communications|2016|448
Surface group modification and carrier transport properties of layered transition metal carbides (Ti <sub>2</sub> CT <sub>x</sub> , T: –OH, –F and –O)
|Nanoscale|2015|392
Large-Area MXene Electrode Array for Flexible Electronics
|ACS Nano|2019|342
Vertical Si-Nanowire <formula formulatype="inline"><tex Notation="TeX">$n$</tex></formula>-Type Tunneling FETs With Low Subthreshold Swing (<formula formulatype="inline"><tex Notation="TeX">$\leq \hbox{50}\ \hbox{mV/decade}$</tex> </formula>) at Room Temperature
|IEEE Electron Device Letters|2011|335