10nm Gate-length junctionless gate-all-around (JL-GAA) FETs based 8T SRAM design under process variation using a cross-layer simulation
Luhao Wang(University of Southern California), Massoud Pedram(University of Southern California), Shahin Nazarian(University of Southern California), Alireza Shafaei(University of Southern California), Shuang Chen(University of Southern California), Yanzhi Wang(Sichuan University)
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