45nm High-k + metal gate strain-enhanced transistors

C. Auth(Intel (United States)), C. Wiegand(Intel (United States)), F. Tambwe(Intel (United States)), Jang‐Soo Chun(Gwangju Institute of Science and Technology), Adam Dalis(Intel (United States)), J. Sandford(Intel (United States)), Jami Wiedemer(Intel (United States)), V. Souw(Intel (United States)), Kelin J. Kuhn(Intel (United States)), K. Mistry(Intel (United States)), L. Shifren(Intel (United States)), S. Jaloviar(Intel (United States)), Alexander Davis(Intel (United States)), B. Norris(Intel (United States)), S. Joshi(Northwestern University), M. Hattendorf(Intel (United States)), Charles H. Wallace(Intel (United States)), Alan J. Thompson(Queen Mary University of London), Mei-Chien Lu(Intel (United States)), G. Glass(Intel (United States)), A. Cappellani(Intel (United States)), P. Hentges(Intel (United States)), D. Lavric(Intel (United States)), T. Troeger(Intel (United States)), T. Ghani(Intel (United States)), P. Ranade(University of California, Berkeley), H. Mariappan(Intel (United States)), P. Vandervoorn(Intel (United States)), D. J. Towner(Intel (United States)), M. Harper(Intel (United States)), K. Tone(Intel (United States)), N. Rahhal-orabi(Intel (United States)), J. W. Klaus(Intel (United States)), Timothy E. Glassman(Intel (United States))
Unknown
June 1, 2008
Cited by 204


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