STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data ReuseJinshan Yue, Huazhong Yang, Zi Wang et al.|IEEE Journal of Solid-State Circuits|2022Cited by 70
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital ArchitectureShengzhe Yan, Ming Liu, Jinshan Yue et al.|IEEE Journal of Solid-State Circuits|2024Cited by 24
A 41.7TOPS/W@INT8 Computing-in-Memory Processor with Zig-Zag Backbone-Systolic CIM and Block/Self-Gating CAM for NN/Recommendation ApplicationsZhuoyu Dai, Ming Liu, Shengzhe Yan et al.|Unknown|2024Cited by 13
An RRAM-Based Computing-in-Memory Macro With Low-Power Readout/Hold Circuits and Activation Differential Strategy for AdderNetYongpan Liu, Shengzhe Yan, Zhuoyu Dai et al.|IEEE Transactions on Very Large Scale Integration (VLSI) Systems|2025Cited by 4
A 28nm 51.6TOPS/W 2.22Mb/mm <sup>2</sup> System-in-One-Macro Computing-in-Memory Chip Utilizing Leakage-Eliminated 2T1C and Capacitor-over-Logic 1T1C eDRAMZhaori Cong, Yongpan Liu, Shengzhe Yan et al.|Unknown|2025Cited by 1