A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital ArchitectureJinshan Yue, Ming Liu, Chaojie He et al.|Unknown|2023Cited by 80
STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data ReuseJinshan Yue, Huazhong Yang, Xueqing Li et al.|IEEE Journal of Solid-State Circuits|2022Cited by 70
Efficient and Robust Nonvolatile Computing-In-Memory Based on Voltage Division in 2T2R RRAM With Input-Dependent Sensing ControlLinfang Wang, Qi Liu, Wang Ye et al.|IEEE Transactions on Circuits & Systems II Express Briefs|2021Cited by 44
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight UpdateJinshan Yue, Huazhong Yang, Yongpan Liu et al.|IEEE Journal of Solid-State Circuits|2023Cited by 24
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital ArchitectureShengzhe Yan, Ming Liu, Jinshan Yue et al.|IEEE Journal of Solid-State Circuits|2024Cited by 24