2 MB Array-Level Demonstration of STT-MRAM Process and Performance Towards L4 Cache Applications
Juan G. Alzate(University of California, Los Angeles), Fatih Hamzaoglu(Intel (United States)), B. Sell(Intel (United States)), Justin Brockman(Intel (United States)), M. Seth(Intel (United States)), Mainuddin Mainuddin(Intel (United States)), J. P. Pellegren(Intel (United States)), P. Heil(Intel (United States)), Meenakshi Sekhar(Intel (United States)), Conor Puls(Intel (United States)), O. Golonzka(Intel (United States)), Refat Jahan(Intel (United States)), Angeline Klemm Smith(Intel (United States)), Andrew J. Smith(Intel (United States)), P. Hentges(Intel (United States)), T. Ghani(Intel (United States)), Tanmoy Pramanik(Intel (United States)), David Ouellette(Intel (United States)), Allison Littlejohn(University College London), Pedro A. Quintero(Intel (United States)), Lili Wei(Intel (United States)), Tauhidur Rahman(Intel (United States)), Ümüt Arslan(Intel (United States)), Nilanjan Das(Intel (United States)), K. Fischer(Intel (United States)), C. Wiegand(Intel (United States)), Y. J. Chen(Intel (United States))
Cited by 104
Related Papers
Switching of perpendicular magnetization by spin–orbit torques in the absence of external magnetic fields
|Nature Nanotechnology|2014|1k
Low-power non-volatile spintronic memory: STT-RAM and beyond
|Journal of Physics D Applied Physics|2013|544
Processing two-dimensional X-ray diffraction and small-angle scattering data in <i>DAWN 2</i>
|Journal of Applied Crystallography|2017|534
Voltage-Induced Ferromagnetic Resonance in Magnetic Tunnel Junctions
|Physical Review Letters|2012|268