Bai Sun

In the era of information, characterized by an exponential growth in data volume and an escalating level of data abstraction, there has been a substantial focus on brain-like chips, which are known for their robust processing power and energy-efficient operation. Memristors are widely acknowledged as the optimal electronic devices for the realization of neuromorphic computing, due to their innate ability to emulate the interconnection and information transfer processes witnessed among neurons. This review paper focuses on memristor-based neuromorphic chips, which provide an extensive description of the working principle and characteristic features of memristors, along with their applications in the realm of neuromorphic chips. Subsequently, a thorough discussion of the memristor array, which serves as the pivotal component of the neuromorphic chip, as well as an examination of the present mainstream neural networks, is delved. Furthermore, the design of the neuromorphic chip is categorized into three crucial sections, including synapse-neuron cores, networks on chip (NoC), and neural network design. Finally, the key performance metrics of the chip is highlighted, as well as the key metrics related to the memristor devices are employed to realize both the synaptic and neuronal components.

Abstract Ion migration as well as electron transfer and coupling in resistive switching materials endow memristors with a physically tunable conductance to resemble synapses, neurons, and their networks. Four different types of volatile memristors and another four types of nonvolatile memristors are systemically surveyed in terms of the switching mechanisms and electrical properties that are the basis of different computing applications. The volatile memristor features spontaneous conductance decay after the cease of electrical/optical stimulations, which are closely related to the surface atom diffusion, metal–insulator–transition (including charge–density–wave), thermal spontaneous emission, and charge polarization. Such unique dynamic state evolution at the edge of chaos has enabled them to emulate certain synaptic and neural dynamics, leading to various applications ranging from spiking neural networks to combinatorial optimizations. Nonvolatile resistive switching behavior originated from the electron spins, ferroelectric polarization, crystalline‐amorphous transitions or interplay between ions and electrons enables the memristor array to implement the vector–matrix multiplication, which is the key convolutional operation in artificial neural networks. The progress, challenges, and opportunities for both volatile and nonvolatile memristor in the level of materials, integration technology, algorithm, and system are highlighted in this review.

In-sensor and near-sensor computing are becoming the next-generation computing paradigm for high-density and low-power sensory processing. To fulfil a high-density and efficient neuromorphic visual system with fully hierarchical emulation of the retina and visual cortex, emerging multimodal neuromorphic devices for multi-stage processing and a fully hardware-implemented system with versatile image processing functions are still lacking and highly desirable. Here we demonstrate an emerging multimodal-multifunctional resistive random-access memory (RRAM) device array based on modified silk fibroin protein (MSFP), exhibiting both optoelectronic RRAM (ORRAM) mode featured by unique negative and positive photoconductance memory and electrical RRAM (ERRAM) mode featured by analogue resistive switching. A full hardware implementation of the artificial visual system with versatile image processing functions is realised for the first time, including ORRAM mode array for the in-sensor image pre-processing (contrast enhancement, background denoising, feature extraction) and ERRAM mode array for near-sensor high-level image recognition, which hugely improves the integration density, and simply the circuit design and the fabrication and integration complexity.

The concept of the memristor, a resistor with memory, was proposed by Chua in 1971 as the fourth basic element of electric circuitry. Despite a significant amount of effort devoted to the understanding of memristor theory, our understanding of the nonpinched current–voltage (I–V) hysteresis loop in memristors remains incomplete. Here we propose a physical model of a memristor, with a capacitor connected in parallel, which explains how the nonpinched I–V hysteresis behavior originates from the capacitive-coupled memristive effect. Our model replicates eight types of characteristic nonlinear I–V behavior, which explains all observed nonpinched I–V curves seen in experiments. Furthermore, a reversible transition from a nonpinched I–V hysteresis loop to an ideal pinched I–V hysteresis loop is found, which explains the experimental data obtained in C15H11O6-based devices when subjected to an external stimulus (e.g., voltage, moisture, or temperature). Our results provide the vital physics models and materials insights for elucidating the origins of nonpinched I–V hysteresis loops ascribed to capacitive-coupled memristive behavior.