A 300-GHz-Band 36-Gb/s Scalable 2x2 2D Phased-Array CMOS Receiver
Satoshi Tanaka(National Hospital Organization), Minoru Fujishima(Hiroshima University), Shuhei Amakawa(Hiroshima University), Shunichi Kubo, Shinsuke Hara(National Institute on Consumer Education), Kunio Sakakibara(Nagoya Institute of Technology), Takeshi Yoshida(Hiroshima University), Akifumi Kasamatsu(National Institute of Information and Communications Technology), Kyoya Takano(Hiroshima University), Yoshiki Sugimoto(Nagoya Institute of Technology)
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