A High-Speed and High-Efficiency Diverse Error Margin Write-Verify Scheme for an RRAM-Based Neuromorphic Hardware Accelerator

Yudeng Lin(Tsinghua University), Huaqiang Wu(Tsinghua University), Jianshi Tang(Tsinghua University), He Qian(Tsinghua University), Qi Qin(Tsinghua University), Qingtian Zhang(Tsinghua University), Bin Gao(Tsinghua University)
IEEE Transactions on Circuits & Systems II Express Briefs
November 24, 2022
Cited by 7


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