A Fixed-Length Transfer Delay Based Adaptive Frequency-Locked Loop for Single-Phase Systems

Zhiyong Dai(Xidian University), Zhen Zhang(Northwestern Polytechnical University), Yongheng Yang(Aalborg University), Frede Blaabjerg(Aalborg University), Yigeng Huangfu(Northwestern Polytechnical University), Juxiang Zhang(Xidian University)
IEEE Transactions on Power Electronics
September 20, 2018
Cited by 41Open Access
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Abstract

This letter presents an adaptive frequency-locked loop (FLL) with fixed-length transfer delay units for single-phase systems. By analyzing the relationship between the grid voltage and its transfer delay signals, a linear regression model of the grid voltage is established. Accordingly, a transfer delay based adaptive FLL (TD-AFLL) is proposed. A mathematic proof indicates that the proposed TD-AFLL can reject both phase offset errors and double-frequency oscillatory errors. Thus, the grid voltage parameters can be estimated accurately, even when the frequency drifts away from its nominal value. Moreover, fast dynamics of the TD-AFLL are achieved due to the transfer delay structure. Experiments verify the effectiveness of the proposed method.


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