Logic area reduction using the deep trench isolation technique based on 40 nm embedded PCM process

Yuan Du, Bomy Chen(Microchip Technology (Germany)), Weiliang Jing(Fudan University), Zhitang Song(Chinese Academy of Sciences), Yong Ye(Anhui University), Xiaoyun Li(Tianjin University of Science and Technology)
IEICE Electronics Express
January 1, 2017
Cited by 2


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