A highly scalable poly-Si junctionless FETs featuring a novel multi-stacking hybrid P/N layer and vertical gate with very high Ion/Ioff for 3D stacked ICs

Ya-Chi Cheng(National Yang Ming Chiao Tung University), Yung‐Chun Wu(National Tsing Hua University), Yi‐Jia Shih(National Sun Yat-sen University), Hung-Bin Chen(National Yang Ming Chiao Tung University), Chun-Yen Chang(National Yang Ming Chiao Tung University), Chun‐Hu Cheng(National Taiwan Normal University)
Unknown
June 1, 2016
Cited by 14


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