Module placement on BSG-structure and IC layout applications

Shigetoshi Nakatake(Tokyo Institute of Technology), Kunihiro Fujiyoshi(Japan Advanced Institute of Science and Technology), Hiroshi Murata(Japan Advanced Institute of Science and Technology), Yoji Kajitani(Tokyo Institute of Technology)
International Conference on Computer Aided Design
November 10, 1996
Cited by 226

Abstract

A new method of packing the rectangles (modules) is presented with applications to IC layout design. It is based on the bounded-sliceline grid (BSG) structure. The BSG dissects the plane into rooms associated with binary relations ``right-to''and ``above'' such that any two rooms are uniquely in either relation. A packing is obtained through an assignment of modules on the BSG, followed by physical realization BSG-PACK. A simulated annealing searches for a good packing of all packings by changing the assignments. Experiments showed that hundreds of rectangles are easily packed in a small rectangle area (chip) with a quite good quality in area efficiency. A wide adaptability is demonstrated specific to IC layout design. Remarkable examples are: the chip is not necessarily rectangle, L-shaped modules and modules which are allowed to partially overlap each other can be handled.


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