Verification on the extreme scalability of STT-MRAM without loss of thermal stability below 15 nm MTJ cell
Ju Hyun Kim(Samsung (South Korea)), W. C. Lim(Samsung (South Korea)), Ung Hwan Pi(Samsung (South Korea)), J. M. Lee(Samsung (South Korea)), W. K. Kim(Samsung (South Korea)), Jung Ho Kim(Samsung (South Korea)), K. W. Kim(Samsung (South Korea)), Y. S. Park(Samsung (South Korea)), S. H. Park(Samsung (South Korea)), Man-Sug Kang(Samsung (South Korea)), Y. H. Kim(Samsung (South Korea)), W.J. Kim(Samsung (South Korea)), Seong-Tae Kim(Samsung (South Korea)), J.H. Park(Samsung (South Korea)), S. C. Lee(Samsung (South Korea)), Y. J. Lee(Samsung (South Korea)), Jae-Man Yoon(Samsung (South Korea)), Sechang Oh(Samsung (South Korea)), S. O. Park(Samsung (South Korea)), Seong Hoon Jeong(Samsung (South Korea)), Seok-Woo Nam(Samsung (South Korea)), H.K. Kang(Samsung (South Korea)), E. S. Jung(Samsung (South Korea))
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Abstract
Scalability of interface driven perpendicular magnetic anisotropy (i-PMA) magnetic tunnel junctions (MTJs) has been improved down to 1X node which verifies STT-MRAM for future standalone memory. With developing a novel damage-less MTJ patterning process, robust magnetic and electrical performances of i-PMA MTJ cell down to 15 nm node could be achieved.
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