A Fifth-Order 20-MHz Transistorized-$LC$ -Ladder LPF With 58.2-dB SFDR, 68-$\mu\hbox{W/Pole/MHz}$ Efficiency, and 0.13-$\hbox{mm}^{2}$ Die Size in 90-nm CMOS

Yong Chen; Yan Wang; Pui‐In Mak; Li Zhang; He Qian

doi:10.1109/tcsii.2012.2234894

A Fifth-Order 20-MHz Transistorized-$LC$ -Ladder LPF With 58.2-dB SFDR, 68-$\mu\hbox{W/Pole/MHz}$ Efficiency, and 0.13-$\hbox{mm}^{2}$ Die Size in 90-nm CMOS

Yong Chen(Dongfeng Motor Group (China)), Yan Wang(Hainan University), Pui‐In Mak(University of Macau), Li Zhang(Foshan University), He Qian(University of Science and Technology of China)

IEEE Transactions on Circuits & Systems II Express Briefs

January 1, 2013

10.1109/tcsii.2012.2234894

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A Fifth-Order 20-MHz Transistorized-$LC$ -Ladder LPF With 58.2-dB SFDR, 68-$\mu\hbox{W/Pole/MHz}$ Efficiency, and 0.13-$\hbox{mm}^{2}$ Die Size in 90-nm CMOS

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