A 1 V multi-threshold voltage CMOS DSP with an efficient power management technique for mobile phone application
S. Mutoh(NTT (Japan)), Satoshi Shigematsu(NTT Basic Research Laboratories), Y. Matsuya(NTT Basic Research Laboratories), Hideki Fukuda(NTT Basic Research Laboratories), J. Yamada(NTT Basic Research Laboratories)
Cited by 74
Abstract
A low-power digital signal processor (DSP) is the key component for battery-driven mobile phone equipment since a vast amount of data needs to be processed for multimedia use. Reduced supply voltage is a direct approach to power reduction. This 1 V DSPLSI with 26 MOPS and 1.1 mW/MOPS performance adopts a multi-threshold-voltage CMOS (MTCMOS) technique. A small embedded power-management processor decreases power during waiting periods.
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