A 180mV FFT processor using subthreshold circuit techniques
A. Wang(Massachusetts Institute of Technology), Anantha P. Chandrakasan(Massachusetts Institute of Technology)
Cited by 256
Abstract
Minimizing energy requires scaling supply voltages below device thresholds. Logic and memory design techniques allowing subthreshold operation are developed and demonstrated. The fabricated 1024-point FFT processor operates down to 180mV using a standard 0.18/spl mu/m CMOS logic process while using 155nJ/FFT at the optimal operating point.
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